CivArchive
    Qwen3VL 32b Minimax-H3 AMD ROCm optimized - Comfy Triton - v1.0
    NSFW

    Qwen3-VL-32B H3-Compatible INT8 TensorWise Text Encoder

    The target hardware assumed to be Ryzen-AI workstations (entry level starting at ~64GB vram like AMD Strix-halo or similar).

    Enable Triton

    For the intended accelerated INT8 TensorWise path, start ComfyUI with:

    python main.py --enable-triton-backend
    

    Container example:

    python /root/ComfyUI/main.py --listen 0.0.0.0 --enable-triton-backend
    

    On startup, confirm that ComfyUI reports that Triton was found and that the comfy-kitchen Triton backend is enabled.

    Do not assume that simply having a Python package called triton installed means that ComfyUI is actually using the accelerated INT8 path.

    For ROCm INT8 use, Triton 3.7 or newer is recommended.

    If your ComfyUI launch command includes --disable-triton-backend, remove it.


    Canonical Hugging Face release, full provenance, hashes, and supporting files:
    https://huggingface.co/PuppetVision/qwen3vl-32b-minimax-h3-amd-rocm-optimized-comfy-triton

    What this is

    This release contains a Qwen3-VL-32B-derived INT8 TensorWise text/vision conditioning encoder for MiniMax H3 workflows in stock ComfyUI.

    It is designed to substantially reduce memory use while retaining the quality and behavior of the validated H3-compatible encoder, with AMD ROCm 7-capable GPUs using Triton as the primary target audience.

    This file is not a standalone Qwen chat model and does not include the MiniMax H3 diffusion model, VAE, LoRA, or sampler. It is a text-encoder file intended for MiniMax H3 ComfyUI workflows using CLIPLoader with type minimax.

    H3-compatible refers to the retained Qwen topology, key layout, and conditioning contract expected by ComfyUI MiniMax H3. The released encoder weights were derived from the official Qwen/Qwen3-VL-32B-Instruct checkpoint. No MiniMax-trained tensor values were introduced into these encoder weights.


    Included model

    qwen3vl_32b_h3_compatible_int8_tensorwise.safetensors

    • Size: 24.726 GiB

    • SHA256: 438036c50abff3292ebc9d891ad8454fb5e7ff53fe6e7622643358ea9d2f2e55

    • 467 linear weights quantized to INT8

    • FP32 per-output-channel weight scales

    • Dynamic rowwise INT8 activation quantization at runtime

    • ConvRot disabled

    • Requires a working comfy-kitchen Triton backend for the intended accelerated path

    This is the performance-oriented H3-compatible encoder and is the only model file included in this Civitai release.


    How it was built

    Official source:

    Qwen/Qwen3-VL-32B-Instruct

    Pinned revision:

    0cfaf48183f594c314753d30a4c4974bc75f3ccb

    The quantization source was first reconstructed as a clean H3-compatible BF16 checkpoint directly from the official Qwen weights using a lossless structural extraction/repack:

    Qwen3-VL token embedding          retained
    full Qwen3-VL vision tower        retained
    language layers 0..49             retained
    language layers 50..63            omitted
    final language-model RMSNorm      omitted
    lm_head                            omitted
    

    ComfyUI MiniMax H3 consumes the unnormalized hidden state after language layer 50, so the H3-compatible encoder intentionally ends at layer index 49 and does not contain the final language-model norm or LM head.

    All 902/902 retained BF16 source tensors were verified as exact dtype, shape, and value matches to the pinned official Qwen checkpoint.

    The INT8 TensorWise model in this Civitai release was then quantized from that independently reconstructed clean BF16 source.

    The BF16 checkpoint itself is not included in this Civitai release. It is documented and available through the canonical Hugging Face repository linked above.


    INT8 TensorWise details

    format                         int8_tensorwise
    ConvRot                        false
    quantized linear weights       467
    language-model matrices        350
    vision matrices                117
    stored weight scale            FP32 [out_features, 1]
    activation quantization        dynamic rowwise INT8
    reproducible quantization      source-dtype division on CPU
    

    The 350 language-model matrices correspond to 50 layers × 7 projections:

    q_proj
    k_proj
    v_proj
    o_proj
    gate_proj
    up_proj
    down_proj
    

    The release tensor data was validated against the known-good high-quality/high-performance INT8 TensorWise baseline.


    ComfyUI installation

    Place the file in:

    ComfyUI/models/text_encoders/
    

    Example:

    cp qwen3vl_32b_h3_compatible_int8_tensorwise.safetensors /path/to/ComfyUI/models/text_encoders/
    

    Restart ComfyUI.

    In your MiniMax H3 workflow, use CLIPLoader with:

    clip_name: qwen3vl_32b_h3_compatible_int8_tensorwise.safetensors
    type:      minimax
    device:    default
    

    AMD ROCm users: check your own GPU environment

    Do not blindly copy GPU-specific environment variables from another AMD system.

    ROCm behavior can vary based on:

    • GPU architecture

    • ROCm version

    • PyTorch build

    • kernel

    • native vs containerized runtime

    • whether your PyTorch build contains native support for your architecture

    Identify your actual hardware and software stack first:

    rocminfo | grep -m1 -E 'gfx[0-9]+'
    
    python - <<'PY'
    import torch
    print('torch:', torch.__version__)
    print('HIP:', torch.version.hip)
    print('GPU:', torch.cuda.get_device_name(0) if torch.cuda.is_available() else 'not visible')
    if torch.cuda.is_available():
        print('arch:', torch.cuda.get_device_properties(0).gcnArchName)
    PY
    

    Then research the recommended environment variables for your specific GPU architecture + ROCm/PyTorch combination.

    In particular, do not blindly set HSA_OVERRIDE_GFX_VERSION. Some compatibility stacks may require an override, while architecture-aware ROCm/PyTorch builds may not.

    Strix Halo example from this project

    The Strix Halo build/validation environment used a dedicated ROCm 7.2.4 userspace under $HOME with:

    ROCM_ROOT="$HOME/amd-rocm/rocm-7.2.4"
    
    export ROCM_PATH="$ROCM_ROOT"
    export HIP_PATH="$ROCM_ROOT"
    export PATH="$ROCM_ROOT/bin:$PATH"
    export LD_LIBRARY_PATH="$ROCM_ROOT/lib:$ROCM_ROOT/lib64:$ROCM_ROOT/llvm/lib${LD_LIBRARY_PATH:+:$LD_LIBRARY_PATH}"
    

    This is an example from the validation system, not a universal prescription for every Strix Halo or AMD GPU.

    Use the paths, architecture settings, and overrides appropriate for your own ROCm installation.


    Provenance and exact hash

    Official upstream:

    Repository: Qwen/Qwen3-VL-32B-Instruct
    Revision:   0cfaf48183f594c314753d30a4c4974bc75f3ccb
    License:    Apache-2.0
    Source shards verified: 14/14 by SHA256
    Official source tensors: 1058
    

    Clean H3-compatible BF16 quantization source:

    Retained tensors: 902
    Retained:         embedding + full vision tower + language layers 0..49
    Omitted:          language layers 50..63 + final LM norm + lm_head
    Repack numerical loss: 0.0
    

    Civitai release artifact:

    File:
    qwen3vl_32b_h3_compatible_int8_tensorwise.safetensors
    
    SHA256:
    438036c50abff3292ebc9d891ad8454fb5e7ff53fe6e7622643358ea9d2f2e55
    
    Size:
    24.726 GiB
    
    Tensors:
    1836
    
    INT8 weights:
    467
    
    FP32 scales:
    467
    
    Quantization markers:
    467
    

    For the full provenance record, validation history, BF16 reference build, and canonical release metadata:

    https://huggingface.co/PuppetVision/qwen3vl-32b-minimax-h3-amd-rocm-optimized-comfy-triton


    Scope and limitations

    • This release contains one INT8 H3 conditioning encoder.

    • It is not a full MiniMax H3 checkpoint.

    • It does not contain the H3 diffusion model, VAE, LoRA, or sampler.

    • The BF16 reference checkpoint is not included in this Civitai release.

    • H3-specific prompt/tokenizer behavior is implemented by ComfyUI and is not contained solely in this safetensors file.

    • Hardware/runtime support depends on ComfyUI, comfy-kitchen, Triton, PyTorch, ROCm, and your GPU architecture.

    • Performance and behavior claims apply to the validated TensorWise recipe represented by this artifact.


    License and attribution

    The upstream Qwen/Qwen3-VL-32B-Instruct repository is released under the Apache License 2.0.

    This artifact is a modified/repacked derivative:

    • the clean BF16 source changes topology/key layout for H3-compatible conditioning;

    • this release additionally applies the documented TensorWise INT8 quantization.

    Qwen, MiniMax, ComfyUI, AMD, and ROCm names are used only to describe source, compatibility, and target runtime. No endorsement by those projects or companies is implied.

    The canonical Hugging Face release contains the complete license, notice, provenance, BF16 reference, and checksum information:

    https://huggingface.co/PuppetVision/qwen3vl-32b-minimax-h3-amd-rocm-optimized-comfy-triton


    Work with me / More projects

    If this model saved you VRAM, debugging time, or helped make a demanding AI workflow more practical, I build a lot more systems like this.

    I’m currently looking for full-time opportunities as an AI Systems Engineer, particularly roles involving model optimization, inference systems, GPU acceleration, quantization, generative AI infrastructure, and the engineering required to make large models run reliably in real-world environments.

    LinkedIn — full-time employment opportunities:
    https://www.linkedin.com/in/allen-b-3a35505a/

    PuppetVisionAI on YouTube — more projects and experiments:
    https://www.youtube.com/@PuppetVisionAI

    Website:
    https://puppetvision.nl

    Description

    Comments (5)

    puppet_vision
    Author
    Sep 7, 2026· 1 reaction
    CivitAI

    I have prepared AMD ROCm optimized unet diffusion-models for Triton but since the community license blocks me from releasing them via huggingface I have sought permission from Minimax-H3 to distribute to prohibited territories, once I have released the diffusion-models on huggingface I will release derived int8 checkpoints on civitai.com. Since I am attempting to work professionally in this space I need to provide both providence and derivation paths.

    lolmao500Sep 8, 2026

    How much faster are we talking ROCM optimized vs default?

    Also, the size seems a lot, its 24gb, the only AMD gpu with more than 24gb of vram is the Pro R9700...

    If we run this on 16gb of ram, guarantee it will go to RAM and speed will crash... no?

    puppet_vision
    Author
    Sep 8, 2026

    @lolmao500 The speed yields better benefits with more resource intensive workloads, this a completely new model it is based on model i built last week but was blocked from release because of their stupid community license, I built this model from official qwen3vl-32b base-model from Qwen's official repo using the model i build last week as a template, taking the long way round t to avoid licensing infringement, so all the benchmarks I did last week are useless I need to redo them with this now model.. it could take a week plus for me to benchmark things.

    Someone on huggingface mentioned that, the target audience for this model is Ryzen AI workstations which have 64GB - 128GB configurable VRAM. It may be possible to get this model under 22GB VRAM, but processing on CPU using 16 GB system without Ryzen AI or a Pro R9700 wont be possible without loss of performance benefits.

    GlowingGuardianGirlSep 7, 2026· 1 reaction
    CivitAI

    So any INT8 isn't optimized as long as it's not enabled in the main.py? Thanks

    "Do not assume that simply having a Python package called triton installed means that ComfyUI is actually using the accelerated INT8 path."

    puppet_vision
    Author
    Sep 8, 2026· 2 reactions

    Thank you kindly for taking the time to read the documentation :)
    Convrot is the primary bottleneck for AMD cards as triton backend does not actually support convrot, it will fall back to whatever other backend is available which can support it, in most scenarios that will be the hip backend which is where our bottleneck occurs. I will release my AMD optimized unets soon, in the meantime there are non AMD optimized int8-tensorwise minimax-h3 available on huggingface, while not as optimized for AMD as my upcoming releases will be, they will still allow you to move away from the standard int8 convrot diffusion-models while you wait.

    TextEncoder
    MiniMax H3

    Details

    Downloads
    29
    Platform
    CivitAI
    Platform Status
    Available
    Created
    9/7/2026
    Updated
    9/8/2026
    Deleted
    -

    Files

    qwen3vl32bMinimaxH3AMD_v10.safetensors

    Mirrors